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01 University of Plymouth Research Outputs
Faculty of Science and Engineering
School of Engineering, Computing and Mathematics
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01 University of Plymouth Research Outputs
Faculty of Science and Engineering
School of Engineering, Computing and Mathematics
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A methodology for efficient tile size selection for affine loop kernels
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UoP_Deposit_Agreement v1.1 20160217.pdf (125.4Kb)
final_v2.pdf (867.1Kb)
Author
Kelefouras, V
Djemame, K
Keramidas, G
Voros, N
Metadata
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URI
http://hdl.handle.net/10026.1/19210
Collections
School of Engineering, Computing and Mathematics
Publisher
Springer
Journal
International Journal of Parallel Programming
The following license files are associated with this item:
Original License
Except where otherwise noted, this item's license is described as Attribution-ShareAlike 4.0 International
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